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Overview of the chapter
This chapter is the further extension of “Computer Architecture” in IGCSE.
This is a small chapter. Mr. Luke finished all of it in just one double-period!
|5.1 Von Neumann Architecture||5.1.1 Structure Overview||2|
|5.2.2 CPU Architecture|
-> Control Unit
-> Control Bus
-> Data Bus
-> Address bus
|5.2 Fetch-execute cycle||4|
|5.3 Interrupt Handling||5|
Next page: 5.1 Von Neumann Architecture